CHIPLET architecture for the SDV

From monolithic SoCs to configurable MCU architectures.

Traditional system-on-chip (SoC) designs tie microprocessor development teams to a fixed silicon architecture. Anyone who needs more computing power or new peripherals has to start from scratch – with a “greenfield approach.” Chiplet-based MCU architectures break this principle.

our USP

Chiplets, not SoC

Chiplet Puzzle Chart
SECOR Chiplet Architecture – the five specialized building blocks: ethernet.CHIPLET, pio.CHIPLET, core.CHIPLET, gpio.CHIPLET, and cpu.CHIPLET on a shared interposer. Always expandable with any CHIPLET – open to your input.

Challenge

Why traditional SoC designs slow down development teams.

Monolithic chip architectures lock OEMs and Tier 1 developers into rigid silicon designs – every new requirement means starting from scratch.

The bottleneck runs deeper than the software

When performance requirements, manufacturing nodes, or peripheral interfaces change, the monolithic SoC becomes a problem: everything is integrated into a single die. A new requirement necessitates a new chip – with a full development and qualification cycle. This consumes time and budget that are no longer available in the SDV environment.

Modular MCUs instead of monolithic SoCs

Chiplets are individual, specialized semiconductor dies that are electrically connected via a common interposer. The result is an MCU whose feature set, computing power, and manufacturing technology can be specifically configured – rather than being fixed once and for all.

Mix of technologies within a unit

Because chiplets are manufactured independently of one another, different process technologies can be combined within a single MCU: high-performance digital processing cores alongside robust analog components – without compromising on either front.

Modular, scalable product families

Depending on their number and combination, these same chiplet modules can be configured into variants ranging from entry-level to high-end models. Development and qualification are performed once at the chiplet level, rather than repeatedly for each product variant.

Faster response to new requirements

New specifications do not require a new chip architecture – rather, a new configuration of the existing modular system. This significantly shortens the path from requirement to qualified hardware.

How it works – step by step

The Chiplet Architecture:
A modular system instead of a one-off design.

The SECOR SDV LAB enables Tier-1 suppliers to cleanly separate old components with ECUs into hardware components and software modules. In future, OEMs will tender for both separately. Software and hardware run in parallel from the outset and are developed jointly, iteratively and quickly.

building block

The chiplet – the specialized individual component

A chiplet is a single, specialized semiconductor die with a clearly defined set of functions—such as digital processing cores or analog measurement and signal processing. It is manufactured using the process node that is optimal for its function.

Chiplets are developed and qualified once—and can then be reused in any number of different MCU configurations.

Organizer

The interposer – the connecting base

The interposer is the substrate on which multiple chiplets are electrically interconnected. It handles communication between the dies and the outside world—similar to a highly integrated circuit board within a single package.

Together, the interposer and chiplets form the actual MCU—a system that can be flexibly configured but is delivered as a compact unit.

Config-
uration

The configured MCU – from entry-level to high-end

By varying the number and selection of chiplets, a complete product family can be created from the same basic building blocks: 4, 8, 16, 32, or 64 cores—depending on requirements. New performance classes do not require a new architecture, just a new combination.

Using the same modular architecture, entry-level models and high-performance units can be built using identical chiplets.

Benefits at a glance

What you gain -
concrete and measurable.

Chiplet architecture isn’t just a concept—it is fundamentally transforming the economics of MCU development.

4- 64
Cores per MCU

Clear performance tiers based on identical chiplet modules—without a new architecture

1 x
Qualification per chiplet

One-time development and certification—then recombinable indefinitely

Product variants

From entry-level to high-end models, all based on the same modular design

The structural advantages of chiplet architecture.

Modular building blocks instead of rigid silicon—this is how chiplet architecture is transforming every step of the development process.

Interposer-based architecture

Chiplets are electrically connected on a common substrate and supplied as a compact MCU unit.

Mixed-Technology Integration

Various processing units within a single MCU - high-performance digital cores alongside robust analog components.

Scalable product families

Chiplets are electrically connected on a common substrate and supplied as a compact MCU unit.

Future-proof SDV architecture

New requirements do not call for a new chip architecture—but rather a new configuration of the existing modular system.

Open-source compatibility

Compatible with Eclipse SDV open-source standards and existing development infrastructures.

Resilient supply chain

Standardized, universally compatible semiconductor components from multiple sources—no proprietary lock-in.

Your Next Step

Ready to rethink the chip architecture for your next SDV project?

SECOR develops chiplet-based MCU architectures for use in software Defined Vehicle – scalable, open, and designed to meet the requirements of Tier 1 development teams. Fraunhofer IIS is currently developing a MCU design-Study. Next steps will be taken in parallel with, among others, imec Germany. Talk to us.